View 5962-8853801PA_156165.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

a
FEATURES High Slew Rate: 10 V/ s Min Fast Settling Time: 0.9 s to 0.1% Type Low Input Offset Voltage Drift: 10 V/ C Max Wide Bandwidth: 3.5 MHz Min Temperature-Compensated Input Bias Currents Guaranteed Input Bias Current: 18 nA Max (125 C) Bias Current Specified Warmed Up over Temperature Low Input Noise Current: 0.01 pA//Hz Type High Common-Mode Rejection Ratio 86 dB Min Pin Compatible with Standard Dual Pinouts Models with MIL-STD-883 Class B Processing Available
Dual Precision JFET-Input Operational Amplifier OP215
GENERAL DESCRIPTION
The OP215 offers the proven JFET-input performance advantages of high speed and low input bias current with the tracking and convenience advantages of a dual op amp configuration. Low input offset voltages, low input currents, and low drift are featured in these high-speed amplifiers. On-chip zener-zap trimming is used to achieve low VOS, while a bias-current compensation scheme gives a low input bias current
at elevated temperature. Thus, the OP215 features an input bias current of 1.4 nA at 70C ambient (not junction) temperature which greatly extends the application usefulness of this device. Applications include high-speed amplifiers for current output DACs, active filters, sample-and-hold buffers, and photocell amplifiers. For additional precision JFET op amps, see the OP249 and AD712 data sheets.
V+ Q5
J5 Q6 R3 NULL Q7
R8 J8 J7
R7
Q10 NULL Q9 J6 Q19
NOTE R7, R8 ARE ELECTRONICALLY ADJUSTED ON-CHIP FOR MINIMUM OFFSET VOLTAGE
R1 Q8 NOMINV INPUT+ J1 J2 -INV J11 INPUT Q1 Q12 Q11 J4 7.4 pF V- R9 R4 R5 3.6 k Q16 Q3 Q4
Q24 C2 Q17 7.4pF Q2 OUTPUT Q18 R6 3.6k J10 Q14 J9 Q15 Q21 Q20 R11 Q23 Q25 R10 R13 Q22
R2
J3
C1
Q13
R12
Figure 1. Simplified Schematic (1/2 OP215)
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002
OP215-SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (at V = 15 V, T = 25 C, unless otherwise noted.)
S A
Parameter Input Offset Voltage Input Offset Current1 Input Bias Current1 Input Resistance Large-Signal Voltage Gain Output Voltage Swing Supply Current Slew Rate Gain Bandwidth Product3
Symbol VOS IOS IB RIN AVO VO ISY
Conditions RS = 50 W `G' Grade Tj = 25C Device Operating Tj = 25C Device Operating
Min
OP215E Type 0.2 3 5 15 18 101,2
Max 1.0 50 100 100 300
Min
OP215G Type Max 2.0 2.5 3 5 15 18 101,2 4.0 6.0 100 200 300 600
Unit mV mV pA pA pA pA W V/mV V V
RL 2 kW, VO = 10 V RL = 10 kW RL = 2 kW `G' Grade
150 12 11
500 13 12.7 6.0 8.5
50 12 11
200 13 12.7 7.0 7.0 10.0 12.0
mA mA V/ s MHz MHz s s s V V dB V/V V/V nV//Hz nV//Hz pA//Hz pA//Hz pF
SR GBW
AVCL = 1
10 3.5
18 5.7 13 2.3 1.1 0.9
5 3.0
15 5.4 12 2.4 1.2 1.0
Closed-Loop Bandwidth CLBW Setting Time tS
AVCL = 1 To 0.01% To 0.05%2 To 0.10% 10.2 -10.2 VCM = IVR E, G Grades VS = 10 V to 16 V VS = 10 V to 15 V fO = 100 Hz fO = 1,000 Hz fO = 100 Hz fO = 1,000 Hz 82
Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Input Noise Voltage Density Input Noise Current Density Input Capacitance
IVR CMRR PSRR n In CIN
14.8 -11.5 100 10 20 15 0.01 0.01 3 51
10.1 -10.1 80
14.8 -11.5 96
16 20 15 0.01 0.01 3
100
NOTES 1 Input bias current is specified for two different conditions. The T j = 25C specification is with the junction at ambient temperature; the device operating specification is with the device operating in a warmed up condition at 25C ambient. The warmed up bias-current value is correlated to the junction temperature value via the curves of IS versus Tj and IS versus TA. PMI has a bias-current compensation circuit that gives improved bias current and bias current over temperature versus standard JFET input op amps. I S and IOS are measured at V CM = 0. 2 Setting time is defined here for a unity gain inverter connection using 2 kW resistors. It is the time required for the error voltage (the voltage at the inverting input pin on the amplifier) to settle to within a specified percent of its final value from the time a 10 V step input is applied to the inverter. See setting time test circuit. 3 Sample tested. Specifications are subject to change without notice.
-2-
REV. A
OP215
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS otherwise noted.)
Parameter Input Offset Voltage Average Input Offset Voltage Drift Without External Trim1 With External Trim Input Offset Current2 Symbol VOS Conditions RS = 50 W
(at VS = 15 V, 0 C
TA
70 C for E Grade, -40 C
OP215E Type 0.4
TA
+85 C for G Grade, unless
OP215G Type Max 3.5 8.0
Min
Max 1.65
Min
Unit mV
TCVOS TCVOSn IOS
RP = 100 kW Tj = 70C TA = 70C Device Operating Tj = 70C TA = 70C Device Operating 10.2 -10.2 VCM = IVR VS = 10 V to 16 V VS = 10 V to 15 V RL 2 kW VO = 10 V RL 10 kW 50 12 80
3 3 0.06 0.08 0.12 0.16 14.7 -11.4 98 13 180 13
15 0.45 0.80 0.70 1.40 10.1 -10.1 76 100
6 4 0.08 0.10 0.14 0.19 14.7 -11.3 94 0.65 1.2 0.9 1.8
V/C V/C nA nA nA nA V V dB
Input Bias Current2
IS
Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain Output Voltage Swing
IVR CMRR PSRR AVO VO
20 35 12 130 13
159
V/V V/mV V
NOTES 1 Sample tested. 2 Input bias current is specified for two different conditions. The T j = 25C specification is with the junction at ambient temperature; the Device Operating specification is with the device operating in a warmed up condition at 25C ambient. The warmed up bias-current value is correlated to the junction temperature value via the curves of IS versus Tj and IS versus TA. PMI has a bias-current compensation circuit that gives improved bias current and bias current over temperature versus standard JFET input op amps. I S and IOS are measured at V CM = 0. Specifications are subject to change without notice.
REV. A
-3-
OP215
ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage OP215E, OP215G . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Operating Temperature Range OP215E . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0C to +70C OP215G . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Maximum Junction Temperature (Tj) . . . . . . . . . . . . . . 150C Differential Input Voltage OP215E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V OP215G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V Input Voltage2 OP215E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V OP215G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . 300C Junction Temperature (Tj) . . . . . . . . . . . . . -65C to +150C
NOTES 1 Absolute maximum ratings apply to packaged parts, unless otherwise noted. 2 Unless otherwise specified, the absolute maximum negative input voltage is equal to one volt more positive than the negative power supply voltage.
Package Type 8-Lead Hermetic DIP (Z) 8-Lead Plastic DIP (P)
JA *
JC
Unit C/W C/W
134 96
12 37
JA
* JA is specified for worst-case mounting conditions, i.e., device in socket for CerDIP and P-DIP packages.
is specified for
PIN CONFIGURATION
OUT A -IN A +IN A V-
1 2 3 4
8
V+ OUT B -IN B +IN B
-++-
A
B
7 6 5
ORDERING INFORMATION 1
Model OP215EZ2 OP215GP2
Package Type 8-Lead CerDIP 8-Lead Plastic DIP
Temperature Range COM XIND
TA = 25C, VOS Max (mV) 1.0 6.0
For military processed devices, please refer to the standard microcircuit drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp SMD Part Number 5962-8853801GA 5962-8853801PA 5962-8838032A2
2
ADI Equivalent OP215AJMDA OP215AZMDA OP215BRCMDA
NOTES 1 Burn-in is available on commercial and industrial temperature range parts in CerDIP and plastic DIP packages. 2 Not for new design, obsolete April 2002.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP215 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-4-
REV. A
Typical Performance Characteristics-OP215
10
500ns
100 90 100 90
100ns
OUTPUT VOLTAGE SWING FROM 0V - V
VS = 15V TA = 25 C AV = -1 5 10mV 5mV 1mV
0
10 0%
10 0%
-5
10mV
5mV
1mV
5V
20mV
-10
0
0.5
1.0 1.5 2.0 SETTLING TIME - s
2.5
TPC 1. Large-Signal Transient Response
TPC 2. Small-Signal Transient Response
TPC 3. Settling Time
18 16 14 12 10
GAIN - dB
90 PHASE MARGIN = 66 100 110
PHASE SHIFT - Degrees
BANDWIDTH - MHz
28
120
VS =
24 20 16 12 8 4 0 -50
15V
OPEN-LOOP VOLTAGE GAIN - dB
100 80 60 40 20 0 -20
VS = 15V TA = 25 C
120 130 140 150 AV > 10 160 170 180 190 AV = 1 200
BANDWIDTH VARIATION FROM 5 < VS < 20V IS < 5% CLOSED-LOOP BANDWIDTH AV = GAIN BANDWIDTH PRODUCT
8 6 4 2 0 -2 -4 -6 VS = 15V -8 TA = 25 C -10 1M
1
10M FREQUENCY - Hz
100M
-25
0 25 50 75 TEMPERATURE - C
100
125
1
10
100
1k 10k 100k 1M 10M 100M FREQUENCY - Hz
TPC 4. Closed-Loop Bandwidth and Phase Shift vs. Frequency
TPC 5. Bandwidth vs. Temperature
TPC 6. Open-Loop Frequency Response
28
PEAK-TO-PEAK AMPLITUDE - V
24 20 16 12 8 4 0 100K
VS = 15V TA = 25 C AV = 1
SLEW RATE - V/ s
AV = 60 VS =
50 40 30 20 10 0 -50
1 15V
COMMON-MODE REJECTION RATIO - dB
70
100 VS = 15V TA = 25 C 80
NEGATIVE
60
40
POSITIVE
20
1M FREQUENCY - Hz
10M
-25 0 25 50 75 100 AMBIENT TEMPERATURE - C
125
0 1
10
100
1k 10k 100k 1M FREQUENCY- Hz
10M 100M
TPC 7. Maximum Output Swing vs. Frequency
TPC 8. Slew Rate vs. Temperature
TPC 9. Common-Mode Rejection Ratio vs. Frequency
REV. A
-5-
OP215
120 110
100
TA = 25 C
140 VOLTAGE NOISE DENSITY - nV/ Hz
POWER SUPPLY REJECTION - dB
100
OUTPUT IMPEDANCE -
VS = 15V TA = 25 C AV = 100
VS = 15V 120 TS = 25 C 100 80 60 40 20 0 1/f CORNER FREQUENCY
90 80 70 60 50 40 30 20 10 0 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M NEGATIVE SUPPLY POSITIVE SUPPLY
10
AV = 10 1
AV = 1 0.1 1k 10k 100k FREQUENCY - Hz 1M 10M
1
10
100 1k FREQUENCY - Hz
10k
TPC 10. Power Supply Rejection vs. Frequency
TPC 11. Output Impedance vs. Frequency
TPC 12. Voltage Noise Density vs. Frequency
BASIC CONNECTIONS
2k +15V 2k 5k 0.1% -15V 0.1% 0.1% 8 1 100pF 3k 5k 0.1% 2N4416 2k AV = -1 +15V VOUT
-IN V+ Rp 100k
2
10V 0
OP215 A 3 4 SUMMING MODE
2N4416
+IN
OP215 A
OUT A
V- NOTE VOS CAN BE TRIMMED WITH POTENTIOMETERS RANGING FROM 10 k TO 1 M . FOR MOST UNITS TCVOS WILL BE MINIMUM WHEN VOS IS ADJUSTED WITH A 100k POTENTIOMETER.
SCOPE
Figure 4. Input Offset Voltage Nulling Figure 2. Settling Time Test Circuit
+15V +5V 2 0V -5V VIN 3 OP215 A 4 2k 8 1 VOUT
100pF
-15V
Figure 3. Slew Rate Test Circuit
-6-
REV. A
OP215
APPLICATIONS INFORMATION Dynamic Operating Considerations BASIC CONNECTIONS
+15V
As with most amplifiers, care should be taken with lead dress, component placement, and supply de-coupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize "pick up" and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to ac ground sets the frequency of the pole. In many instances, the frequency of this pole is much greater than the expected 3 dB frequency of the closed-loop gain and, consequently, there is negligible effect on stability margin. However, if the feedback pole is less than approximately six times the expected 3 dB frequency, a lead capacitor should be placed from the output to the negative input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than, or equal to, the original feedback pole time constant.
100k 6 200 OP215 B 5 8 7
100k 2 3 OP215 A 4 1
-15V NOTES 1. TA = 125 C TO 150 C 2. RESISTORS ARE TYPE RN55D, 1%
Figure 5. Burn-In Circuit
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead CERDIP (Z-Suffix)
0.005 (0.13) MIN
8
8-Lead Plastic DIP (P-Suffix)
0.430 (10.92) 0.348 (8.84)
8 5
0.055 (1.4) MAX
5
PIN 1
1 4
0.310 (7.87) 0.220 (5.59)
PIN 1
0.280 (7.11) 0.240 (6.10) 0.325 (8.25) 0.300 (7.62) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93)
1
4
0.100 (2.54) BSC 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 15 0 0.015 (0.38) 0.008 (0.20) 0.320 (8.13) 0.290 (7.37)
0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93)
0.100 (2.54) BSC
SEATING 0.023 (0.58) 0.070 (1.78) PLANE 0.014 (0.36) 0.030 (0.76)
0.022 (0.558) 0.070 (1.77) SEATING 0.014 (0.356) 0.045 (1.15) PLANE
REV. A
-7-
OP215 Revision History
Location Data Sheet changed from REV. 0 to REV. A. Page
Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2, 3 Edits to ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Deleted WAFER TEST LIMITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Deleted DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Deleted TYPICAL ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to BURN-IN CIRCUIT figure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
C02683-0-4/02(A) PRINTED IN U.S.A.
-8-
REV. A

▲Up To Search▲

Price & Availability of 5962-8853801PA

	To Download 5962-8853801PA Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .